The present invention relates generally to development of ferroelectric field effect transistors having a ferroelectric layer, and in particular to development of field effect transistors containing a layer of zinc oxide doped with lithium and/or magnesium, and memory devices and other apparatus produced therefrom.
Placing ferroelectric material between the plates of a capacitor causes the capacitor to exhibit a memory effect in the form of a charge displacement or electric displacement (D) between the plates of the capacitor. In effect, when the capacitor is charged with the field lines running in one direction across the capacitor plates, a residual electric displacement remains after the electric field (E) is removed from the capacitor plates. If an opposite electric field is applied to the capacitor plates, an opposite residual electric displacement remains. A plot of the electric displacement of a ferroelectric material between the plates of a capacitor against the applied electric field across the plates of the capacitor exhibits a classic D-E hysteresis curve 100 as shown in FIG. 1. Electric displacement is related to polarization through the expression D=xcex50E+P, where xcex50 is the permittivity of free space and P is the polarization of the ferroelectric material.
The hysteresis curve 100 of FIG. 1 exhibits a spontaneous polarization. Spontaneous polarization, Ps, is the magnitude of polarization at the intersection of the hysteresis curve 100 with the electric displacement axis 110 (at E=0). Spontaneous polarization is thus equivalent to the electric displacement in the absence of an applied electric field and is represented by points 130 and 140, generally having equal magnitude and opposite polarity. The polarity of the spontaneous polarization is dependent on the history of the applied electric field prior to removal. The coercive field 150, Ec, is the magnitude of the electric field at the intersection of the hysteresis curve 100 with the electric field axis 120 (at D=0) as shown at points 160 and 170. Permittivity, xcex5, is defined as the incremental change in electric displacement per unit electric field when the magnitude of the measuring field is very small compared to the coercive field 150.
Using ferroelectric material in the manufacture of memory elements for memory devices is also known in the art. Such memory devices find utilization in a variety of electronic devices and systems. By applying a coercive field across the plates of a ferroelectric capacitor to produce one polarization or another, the spontaneous polarization can represent a nonvolatile 1 or 0 in the memory element. If a ferroelectric capacitor has zero volts applied across its plates, it may be polarized as indicated by either point 130 or 140 in FIG. 1. Assuming that the polarization is at point 140, if a positive voltage is applied across the capacitor that is greater than the coercive field 150, the capacitor will conduct current and move to a new polarization at point 180. When the voltage across the capacitor returns to zero, the polarization will retain its polarity and move to point 130. If a positive voltage is applied across the capacitor when it is polarized at point 130, the capacitor will not conduct current, but will move to point 180. It can be seen that a negative potential can be used to change the polarization of a capacitor from point 130 to point 140. Therefore, points 130 and 140 can represent two logic states occurring when zero volts are applied to the capacitor and which depend upon the history of voltage applied to the capacitor. As can be seen from the foregoing description, sensing the polarization of the ferroelectric capacitor through current flow can result in a destructive read, i.e., sensing the polarization of a capacitor may reverse the polarization and thus alter the data stored on the element. Such destructive reads require that the data read from the memory element be restored to the memory element following the read operation.
Another approach has included the use of a complementary pair of metal-ferroelectric-semiconductor transistors as a memory element. Using this approach, others have formed the complementary transistor pair through the deposition of ferroelectrics directly on a silicon substrate, utilizing the ferroelectric layer as the gate insulator in the field effect transistors (FETs). The polarization of the ferroelectric layer controls the threshold voltage of the transistor, allowing non-destructive reads based on conductivity between the source and drain of the transistor. However, use of a ferroelectric layer as a gate insulator can result in undesirable surface interfaces and surface states which preclude effective transistor operation.
More recently, layered device structures have been proposed where an insulation layer is formed on a silicon substrate. A lower conductor layer is formed on the insulation layer, a ferroelectric layer is formed on the lower conductor layer and an upper conductor layer is formed on the ferroelectric layer to produce a stacked gate structure. Such devices overcome the surface interface and surface state issues of memory elements such as those having the ferroelectric layer in contact with the silicon substrate. They do so by separating the ferroelectric layer from the silicon substrate using an insulation layer in contact with the silicon substrate. However, such gate stack structures incorporate a further difficulty in that a programming conductor, i.e., the lower conductor layer, is interposed between the insulation layer and the ferroelectric layer to program the device without exceeding the breakdown voltage of the gate insulator, thus creating a conduction path through the transistor that is unnecessary for transistor operation.
Others have proposed the use of extra capacitors in the gate structure to overcome the problem of applying a large programming voltage across the gate insulator. However, these approaches introduce extra process complexity in the formation of the additional capacitors.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for improved ferroelectric transistors, methods of producing same and devices produced therefrom.
One embodiment includes a field effect transistor. The field effect transistor includes a gate insulator layer overlying a substrate and a ferroelectric layer overlying the gate insulator layer. In another embodiment, the ferroelectric layer is overlying and adjacent the gate insulator layer. In a further embodiment, the ferroelectric layer is overlying the gate insulator layer without a programming conductor interposed between the ferroelectric layer and the gate insulator layer. The ferroelectric layer comprises a weak ferroelectric material having a spontaneous polarization in the range of approximately 0.01 xcexcCoulomb/cm2 to approximately 1 xcexcCoulomb/cm2. In another embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the ferroelectric layer is approximately 10 times the thickness of the gate insulator layer. In a further embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the ferroelectric layer is less than approximately 10 times the thickness of the gate insulator layer. In a still further embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the ferroelectric layer is less than approximately 10,000 xc3x85 and the thickness of the gate insulator layer is less than approximately 1,000 xc3x85. In another embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the gate insulator layer and the ferroelectric layer are adjusted such that a programming voltage applied across the gate insulator layer and the ferroelectric layer in series is sufficient to polarize the ferroelectric layer without exceeding a breakdown voltage of the gate insulator layer.
Another embodiment includes a field effect transistor. The field effect transistor includes a gate insulator layer overlying a substrate and a ferroelectric layer overlying the gate insulator layer. The ferroelectric layer comprises a doped zinc oxide material having a general formula of Znx(LiyMgz)O where x ranges from approximately 0.70 to approximately 0.99, y and z each independently range from approximately 0.00 to approximately 0.30 and the sum of y+z ranges from approximately 0.01 to approximately 0.30. In another embodiment, the ferroelectric layer is overlying and adjacent the gate insulator layer. In a further embodiment, the ferroelectric layer is overlying the gate insulator layer without a programming conductor interposed between the ferroelectric layer and the gate insulator layer. In another embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the ferroelectric layer is approximately 10 times the thickness of the gate insulator layer. In a further embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the ferroelectric layer is less than approximately 10 times the thickness of the gate insulator layer. In a still further embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the ferroelectric layer is less than approximately 10,000 xc3x85 and the thickness of the gate insulator layer is less than approximately 1,000 xc3x85. In another embodiment, the gate insulator layer and the ferroelectric layer each have a thickness, where the thickness of the gate insulator layer and the ferroelectric layer are adjusted such that a programming voltage applied across the gate insulator layer and the ferroelectric layer in series is sufficient to polarize the ferroelectric layer without exceeding a breakdown voltage of the gate insulator layer.
A further embodiment includes a method of programming a ferroelectric transistor having a gate insulator layer and a ferroelectric layer. The method includes applying a programming voltage across the gate insulator layer and the ferroelectric layer in series, wherein the programming voltage is capable of polarizing the ferroelectric layer without exceeding a breakdown voltage of the gate insulator layer. In a still further embodiment, the ferroelectric layer contains a ferroelectric material having a spontaneous polarization in the range of approximately 0.01 xcexcCoulomb/cm2 to approximately 1 xcexcCoulomb/cm2. In yet another embodiment, the ferroelectric layer contains a doped zinc oxide material having a general formula of Znx(LiyMgz)O where x ranges from approximately 0.70 to approximately 0.99, y and z each independently range from approximately 0.00 to approximately 0.30 and the sum of y+z ranges from approximately 0.01 to approximately 0.30.
One embodiment includes a method of forming a field effect transistor. The method includes forming a gate insulator layer overlying a substrate, forming a ferroelectric layer overlying the gate insulator layer, forming an upper conductor layer overlying the ferroelectric layer, and patterning the gate insulator layer, the ferroelectric layer and the upper conductor layer to define a gate stack structure having sidewalls. The method further includes forming spacers on the sidewalls of the gate stack structure and forming source and drain regions in the substrate. In another embodiment, forming a ferroelectric layer overlying the gate insulator layer includes forming a ferroelectric layer overlying and adjacent the gate insulator layer. In a further embodiment, forming a ferroelectric layer overlying the gate insulator layer includes forming a ferroelectric layer overlying the gate insulator layer without a programming conductor interposed between the ferroelectric layer and the gate insulator layer.
Further embodiments of the invention include ferroelectric field effect transistors and methods of varying scope, as well as apparatus, devices, modules and systems making use of such ferroelectric field effect transistors and methods.